Architectures & Techniques for Video, Audio and Multimedia Compression
The Digital Systems Team conducts research on designing and optimizing in hardware the algorithmic techniques for processing of audio and video data streams and multimedia applications.
Related Projects
- PAVET Advanced Real-Time Video Encoder (05PAV-181 GSRT of Greece)
- INOS (IST-2002-507794)
- HIPRO - Digital Signal Processing for Audio Applications (IST-1999-20380)
- PAVE 99BE267 - Research and development of New Technology Speaker Systems
Related Publications
- G. Georgis, G. Lentaris and D. Reisis, "Reduced Complexity Super-Resolution for Low-Bitrate Video Compression", Circuits and Systems for Video Technology, IEEE Transactions on , vol.26, no.2, pp.332-345, Feb. 2016.
- G. Georgis, G. Lentaris and D. Reisis, "Acceleration Techniques and Evaluation on Multicore CPU, GPU and FPGA for Image Processing & Super-Resolution", Journal of Real-Time Image Processing, pp.1-28, Jul. 2016.
- G. Georgis, G. Lentaris and D. Reisis, "Single-Image Super-Resolution using Low-Complexity Adaptive Iterative Back-projection", Digital Signal Processing, 18th IEEE International Conference on, Santorini Greece, July 2013.
- G. Georgis, G. Lentaris and D. Reisis, "Low Complexity Interpolation Filters for Motion Estimation and Application to the H.264 Encoders", Design and Architectures for Digital Signal Processing, Chapter 6, G. Ruiz and J. A. Mitchell, InTech Publishing, pp.137-154, January 2013.
- G. Georgis, G. Lentaris, and D. Reisis, "Study of interpolation filters for motion estimation with application in H.264/AVC encoders", Electronics Circuits and Systems, 18th IEEE International Conference on,pp. 9-12, Beirut Lebanon, December 2011.
- G. Lentaris, D. Reisis, "A Graphics Parallel Memory Organization Exploiting Request Correlations", IEEE Transactions on Computers, Vol.59, No6, pp762-775, June 2010
- A. Drolapas, G. Lentaris, D. Reisis, "Programmable Motion Estimation Architecture", IEEE International Conference on Electronics, Circuits, and Systems (ICECS), 2009
- K. Babionitakis, G. Doumenis, G. Georgakarakos, G. Lentaris, K. Nakos, D. Reisis, J. Sifnaios, N. Vlassopoulos, "A Real-Time H.264/AVC VLSI Encoder Architecture", Journal of Real-Time Image Processing, Issues 1-2, Volume 3, 2008, Springer
- K. Babionitakis, G. Doumenis, G. Georgakarakos, G. Lentaris, K. Nakos, D. Reisis, J. Sifnaios, N. Vlassopoulos, "A Real-Time Motion Estimation FPGA Architecture", Special Issue on Field-Programmable Technology, Journal of Real-Time Image Processing, Issues 1-2, Volume 3, 2008, Springer
- V.A. Chouliaras. V.M. Dwyer, S. Agha, J.L. Nunez-Yanez, D. Reisis, K. Nakos. K. Manolopoulos, "Customization of an embedded RISC CPU with SIMD extensions for video encoding", pages:135-152, 2007, The VLSI Journal of Integration, Elsevier
- V. Chouliaras, T. Jacobs, J. Nunez-Yanez, K. Manolopoulos, K. Nakos, D. Reisis, "Thread Parallel MPEG-2 and MPEG-4 Encoders for Shared-Memory System-on-Chip Multiprocessors", International Journal of Computers and Applications, Issue 4, Volume 29, 2007, Acta Press
- K. Babionitakis, G. Lentaris, K. Nakos, D. Reisis, N. Vlassopoulos, G. Doumenis, G. Georgakarakos, J. Sifnaios, "An Efficient H.264 VLSI Advanced Video Encoder", pp. 545-548, December 2006, IEEE International Conference on Electronics, Circuits and Systems
- N. Vlassopoulos, D. Reisis, G. Lentaris, G. Tombras, E. Prosalentis, N. Ritas, K. Tsakalis, "An approach for efficient design of digital amplifers", May 2006, IEEE International Symposium on Circuits and Systems