Dionysios I. Reisis has received his Ptychion in Electrical Engineering from the University of Patras, Greece, in 1983, and his M.Sc. and Ph.D. degrees in Computer Engineering from the Dpt of Electrical and Computer Engineering of the University of Southern California, USA, in 1989 with PhD Thesis: “Parallel Algorithms on Mesh Connected Computer with Static and Reconfigurable Buses”. This research involved parallel mesh computers and algorithms for signal, image and graph processing, vision and VLSI architectures. In 1990 he started cooperation with the Telecommunications lab of the Division of Computer Science of NTUA as a research associate. In 1991 he has been elected Lecturer and in 1996 Assistant Professor of the Electronics Laboratory of the Department of Physics of the University of Athens (NKUA).

Research interests include parallel architectures and algorithms for image and graph signal processing with applications in VLSI environment, as well as real time hardware design and efficient algorithms design for telecommunication system support. Apart from his participation in projects (ONR, DARPA, NSF, RACE, ACTS, ESPRIT, IST) he has publications in scientific magazines (IEEE transactions on Computers, on PAMI) and conferences (ICPP, IPPS, MIT on VLSI, CVPR, UUCP, ISS etc.) and has co-written books on parallel processing. He is a reviewer in magazines (IEEE transactions, JPDC, SIAM on Computing etc.) and conferences (ICPP, IPPS, CVPR, Globecom, etc.)