PANDA - Asymmetric Passive Optical Network for xDSL and FTTH Access
The role of DST is to design and implement in an FPGA environment the MAC functions of the XG-PON Optical Network Unit (ONU) supporting the G.987.3 standard for the XG-PON, the TR-167 for the V interface and the G.988 for the OMCI management. The specified throughput is 2.5 Gbps for the transmitter and 10 Gbps for the receiver. The development takes place on Xilinx 7 series FPGA boards (KC705 and VC707).
Paper Output
- G. Menoutis, A. Foteas, N. Liakopoulos, G. Georgis, D. Reisis and G. Synnefakis, "A Configurable Transmitter Architecture & Organization for XG-PON OLT/ONU/ONT Network Elements", Electronics Circuits and Systems, 22nd IEEE International Conference on, Cairo Egypt, December 2015.
- G. Georgis, Ch. Tzeranis, G. Synnefakis and D. Reisis, "FPGA Design of the Decoding Functions in the Physical Layer Adaptation Subsystem of the XG-PON Optical Network Unit/Terminal", Ph.D. Research in Microelectronics and Electronics, 10th IEEE International Conference on, Grenoble, France, July 2014 [Silver Leaf Award].
- G. Georgis, Ch. Tzeranis, G. Synnefakis and D. Reisis, "XG-PON Optical Network Unit Downstream FEC Design Based on Truncated Reed-Solomon Code", Electronics Circuits and Systems, 21st IEEE International Conference on, Marseille France, December 2014.