The Digital Systems Team conducts research on parallel techniques and parallel VLSI architectures for applications in telecommunications, Networks and Signal Processing. The team focuses on techniques to improve the performance of algorithms widely used in these areas such as the Fast Fourier Transform (FFT), Digital Filters, Encoding/Decoding techniques, etc. DST has studied and proposed techniques for parallel accessing the memories of FFT architectures using either in-place or pipelined memory schemes. Furthermore, the team has studied and designed pipelined FFT architectures for large input data sets and high speed implementations. Depending on the application area the design strategy targets to accommodating the application's requirements including mainly real time performance, high sustainable throughput, efficiently reconfigurable architectures, minimization of VLSI Area and optimize power consumption.